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MCP2003/4
LIN J2602 Transceiver
Features
* The MCP2003 and MCP2004 are compliant with LIN Bus Specifications 1.3, 2.0 and 2.1 and are compliant to SAE J2602 * Support Baud Rates up to 20 Kbaudwith LIN-compatible output driver * 43V load dump protected * Very low EMI meets stringent OEM requirements * Very high ESD immunity: - >20kV on VBB (IEC 61000-4-2) - >14kV on LBUS (IEC 61000-4-2) * Very high immunity to RF disturbances meets stringent OEM requirements * Wide supply voltage, 6.0V-27.0V continuous * Extended Temperature Range: -40 to +125C * Interface to PIC(R) MCU EUSART and standard USARTs * Local Interconnect Network (LIN) bus pin: - Internal pull-up resistor and diode - Protected against battery shorts - Protected against loss of ground - High current drive * Automatic thermal shutdown * Low-power mode: - Receiver monitoring bus and transmitter off, ( 5 A)
Description
This device provides a bidirectional, half-duplex communication physical interface to automotive and industrial LIN systems to meet the LIN bus specification Revision 2.1 and SAE J2602. The device is short circuit and overtemperature protected by internal circuitry. The device has been specifically designed to operate in the automotive operating environment and will survive all specified transient conditions while meeting all of the stringent quiescent current requirements. MCP200X family members: * 8-pin PDIP, DFN and SOIC packages: - MCP2003, LIN-compatible driver, with WAKE pins - MCP2004, LIN-compatible driver, with FAULT/TXE pins
Package Types
MCP2003 PDIP, SOIC
RXD 1 CS 2 WAKE 3 TXD 4 8 VREN 7 VBB
MCP2004 PDIP, SOIC
RXD 1 CS 2 8 VREN 7 VBB 6 LBUS 5 VSS
6 LBUS FAULT/TXE 3 5 VSS TXD 4
MCP2003 4x4 DFN*
RXD 1 CS 2 WAKE 3 TXD 4 EP 9 8 VREN 7 VBB
MCP2004 4x4 DFN*
RXD 1 CS 2 EP 9 8 VREN 7 VBB 6 LBUS 5 VSS
6 LBUS FAULT/TXE 3 TXD 4 5 VSS
* Includes Exposed Thermal Pad (EP); see Table 1-1.
2010 Microchip Technology Inc.
DS22230A-page 1
MCP2003/4
MCP2003 Block Diagram
VREN Ratiometric Reference WAKE Wake-Up Logic and Power Control VBB
RXD CS TXD OC
~30 k
LBUS VSS
Thermal Protection
Short Circuit Protection
MCP2004 Block Diagram
VREN Ratiometric Reference Wake-Up Logic and Power Control RXD CS
~30 k
VBB
TXD FAULT/TXE
OC
LBUS VSS
Thermal Protection
Short Circuit Protection
DS22230A-page 2
2010 Microchip Technology Inc.
MCP2003/4
1.0 DEVICE OVERVIEW
1.2.3 THERMAL PROTECTION
The MCP2003/4 provides a physical interface between a microcontroller and a LIN bus. This device will translate the CMOS/TTL logic levels to LIN logic level, and vice versa. It is intended for automotive and industrial applications with serial bus speeds up to 20 Kbaud. LIN specification 2.1 requires that the transceiver of all nodes in the system is connected via the LIN pin, referenced to ground and with a maximum external termination resistance of 510 from LIN bus to battery supply. The 510 corresponds to 1 master and 15 slave nodes. The VREN pin can be used to drive the logic input of an external voltage regulator. This pin is high in all modes except for Power Down mode. The thermal protection circuit monitors the die temperature and is able to shut down the LIN transmitter. There are two causes for a thermal overload. A thermal shut down can be triggered by either, or both, of the following thermal overload conditions. * LIN bus output overload * Increase in die temperature due to increase in environment temperature Driving the TXD and checking the RXD pin makes it possible to determine whether there is a bus contention (Rx = low, Tx = high) or a thermal overload condition (Rx = high, Tx = low). After a thermal overload event, the device will automatically recover once the die temperature has fallen below the recovery temperature threshold. See Figure 1-1.
1.1
1.1.1
External Protection
REVERSE BATTERY PROTECTION FIGURE 1-1: THERMAL SHUTDOWN STATE DIAGRAM
LIN bus Shorted to VBB Operation Mode Transmitter Shutdown
An external reverse-battery-blocking diode should be used to provide polarity protection (see Example 1-1).
1.1.2
TRANSIENT VOLTAGE PROTECTION (LOAD DUMP)
An external 43V transient suppressor (TVS) diode, between VBB and ground, with a 50 transient protection resistor (RTP) in series with the battery supply and the VBB pin serve to protect the device from power transients (see Example 1-1) and ESD events. While this protection is optional, it is considered good engineering practice.
Temp < SHUTDOWNTEMP
1.2
1.2.1
Internal Protection
ESD PROTECTION
For component-level ESD ratings, please refer to the maximum operation specifications.
1.2.2
GROUND LOSS PROTECTION
The LIN Bus specification states that the LIN pin must transition to the recessive state when ground is disconnected. Therefore, a loss of ground effectively forces the LIN line to a high-impedance level.
2010 Microchip Technology Inc.
DS22230A-page 3
MCP2003/4
1.3 Modes of Operation
For an overview of all operational modes, refer to Table 1-1. the TXD pin is held low when CS goes high, the device will transition to Transmitter Off mode instead of Operation mode.
1.3.1
POWER-DOWN MODE
1.3.3
OPERATION MODE
In Power Down mode, the transmitter and VREN are both off. Only the receiver section and the wake-up circuits are operational. This is the lowest power mode. On bus activity (e.g. a BREAK character), CS going to a high level, or on a falling edge on WAKE, the device will immediately enter Ready mode. If CS is held high as the device transitions from Power Down to Ready mode, the device will transition to Operation mode as soon as internal voltages stabilize. Note: Bus activity is defined as LBUS dropping below VIL(LBUS) for longer than the Bus Activity Debounce time (tBDB).
In this mode, all internal modules are operational. The MCP2003/4 will go into the Power Down mode on the falling edge of CS. The MCP2003/4 will enter Transmitter Off mode in the event of a Fault condition. These include: thermal overload, bus contention and TXD timer expiration. The MCP2004 device can also enter Transmitter Off mode if the FAULT/TXE pin is pulled low
1.3.4
TRANSMITTER OFF MODE
1.3.2
READY MODE
Transmitter Off mode is reached whenever the transmitter is disabled either due to a Fault condition or pulling the nFAULT/TXE pin low on the MCP2004. The fault conditions include: thermal overload, bus contention or TXD timer expiration. The MCP2003/4 will go into Power Down mode on falling edge of CS, or return to Operation mode if all faults are resolved and the FAULT/TXE pin on the MCP2004 is high.
Upon entering the Ready mode, VREN is enabled and the receiver detect circuit is powered up. The transmitter remains disabled and the device is ready to receive data but not to transmit. Upon VBB supply pin power-on, the device will remain in Ready mode as long as CS is low. If CS transitions high, the device will enter Operation mode. However, if
FIGURE 1-2:
POR
VREN OFF RX OFF TX OFF
OPERATIONAL MODES STATE DIAGRAM - MCP2003
Ready Mode
VREN ON RX ON TX OFF
VBB > 5.5V
CS = 1 and TXD = 1 CS = 1 and TXD = 0 CS = 1 and TXD = 1 and No Fault Fault (Thermal or Timer)
Falling edge on LIN or CS = 1
TOFF Mode
VREN ON RX ON TX OFF
Operation Mode
VREN ON RX ON TX ON
CS=0 CS=0
Sleep Mode
VREN OFF RX OFF TX OFF
DS22230A-page 4
2010 Microchip Technology Inc.
MCP2003/4
FIGURE 1-3:
POR
VREN OFF RX OFF TX OFF
OPERATIONAL MODES STATE DIAGRAM - MCP2004
Ready Mode
VREN ON RX ON TX OFF
VBB > 5.5V
CS = 1 and (TXE = 0 or TXD = 0)
CS = 1 and TXD = 1 and TXE = 1
Falling edge on LIN or CS = 1
TOFF Mode
VREN ON RX ON TX OFF
CS = 1and TXE = 1 and TXD = 1 and No Fault Fault (Thermal or Timer) or TXE=0
Operation Mode
VREN ON RX ON TX ON
CS = 0 CS = 0
Sleep Mode
VREN OFF RX OFF TX OFF
Note:
While the MCP2003/4 is in thermal shutdown, TXD should not be actively driven high or it may power internal logic through the ESD diodes and may damage the device.
TABLE 1-1:
State POR Ready Operation
OVERVIEW OF OPERATIONAL MODES
Transmitter Receiver OFF OFF ON OFF ON ON Vren OFF ON ON Operation Read CS, if low, then Ready; if high, Operational mode If CS high level, then Operation mode Bus Off state If CS low level, then Power Down; Normal Operation If FAULT/TXE low level, then Transmitter Off mode mode On LIN bus falling, go to Ready mode. On CS Low Power mode high level, go to Operation mode If CS low level, then Power Down; FAULT/TXE only If FAULT/TXE and TXD high, then Operation available on mode MCP2004 Comments
Power Down Transmitter Off
OFF OFF
Activity Detect ON
OFF ON
2010 Microchip Technology Inc.
DS22230A-page 5
MCP2003/4
1.4 Typical Applications
TYPICAL MCP2003 APPLICATION
+12 50 43V +12
EXAMPLE 1-1:
1.0 F
(See Note)
220 K VDD TXD RXD I/O VOLTAGE REG VREN VBB
Master Node Only +12
TXD RXD CS WAKE Wake-up 100 nF LBUS
1 K LIN Bus 27V
VSS
Note:
For applications with current requirements of less than 20 mA, the connection to +12V can be deleted, and voltage to the regulator supplied directly from the VREN pin.
EXAMPLE 1-2:
TYPICAL MCP2004 APPLICATION
+12 50 43V +12
Wake-up
1.0 F
Master Node Only +12
220 K VDD TXD RXD I/O I/O VOLTAGE REG VREN VBB 1 K LBUS 27V LIN Bus
TXD RXD CS FAULT/TXE
100 nF
VSS
DS22230A-page 6
2010 Microchip Technology Inc.
MCP2003/4
EXAMPLE 1-3: TYPICAL LIN NETWORK CONFIGURATION
40m + Return LIN bus
1 k VBB LIN bus MCP200X LIN bus MCP200X Slave 1 C Master C LIN bus MCP200X Slave 2 C LIN bus MCP200X Slave n <23 C
2010 Microchip Technology Inc.
DS22230A-page 7
MCP2003/4
1.5 Pin Descriptions
PINOUT DESCRIPTIONS
8-Pin PDIP, SOIC 1 2 3 8-Pin DFN 1 2 3 MCP2003 Normal Operation Receive Data Output (OD) Chip Select (TTL) Wake up, HV tolerant MCP2004 Normal Operation Receive Data Output (OD) Chip Select/Local WAKE (TTL) Fault Detect Output (OD) Transmitter Enable (TTL) Transmit Data Input (TTL) Ground LIN bus (bidirectional) Battery positive
TABLE 1-1:
Pin Name RXD CS WAKE (MCP2003 only) FAULT/TXE (MCP2004 only) TXD VSS LBUS VBB VREN EP
4 5 6 7 8 --
4 5 6 7 8 9
Transmit Data Input (TTL) Ground LIN bus (bidirectional) Battery positive
Voltage Regulator Enable Output Voltage Regulator Enable Output Exposed Thermal Pad. Do not electrically connect or connect to Vss Exposed Thermal Pad. Do not electrically connect or connect to Vss
Legend: TTL = TTL Input Buffer; OD = Open-Drain Output
1.5.1
RECEIVE DATA OUTPUT (RXD)
1.5.3
WAKE UP INPUT (WAKE)
The Receive Data Output pin is a open drain (OD) output and follows the state of the LIN pin.
This pin is only available on the MCP2003. The WAKE pin has an internal 800K pull up to VBB. A falling edge on the WAKE pin causes the device to wake from Power Down mode. Upon waking, the MCP2003 will enter Ready mode
1.5.2
CS (CHIP SELECT)
Chip Select Input pin. An internal pull-down resistor will keep the CS pin low. This is done to ensure that no disruptive data will be present on the bus while the microcontroller is executing a Power-on Reset and an I/O initialization sequence. The pin must detect a high level to activate the transmitter. If CS = 0 when the VBB supply is turned on, the device stays in Ready mode. In Ready mode, the receiver is on and the LIN transmitter driver is off. If CS = 1 when the VBB supply is turned on, the device will proceed to the Operation mode as soon as internal voltages stabilize. This pin may also be used as a local wake-up input (Refer to Example 1-1). In this implementation, the microcontroller I/O controlling the CS should be converted to a high-impedance input allowing the internal pull-down resistor will keep CS low. An external switch, or other source, can then wake-up both the transceiver and the microcontroller (if powered). Note: It is not recommended to tie CS high as this can result the MCP2003/4 entering Operation mode before the microcontroller is initialized and may result in unintentional LIN traffic.
1.5.4
FAULT/TXE
This pin is only available on the MCP2004. This pin is bidirectional and allows disabling of the transmitter, as well as fault reporting related to disabling the transmitter. This pin is an open-drain output with states as defined in Table 1-2. The transmitter is disabled whenever this pin is low (`0'), either from an internal Fault condition or by an external drive. While the transmitter is disabled, the internal 30 k pull-up resistor on the LBUS pin is also disconnected to reduce current. Note: The FAULT/TXE pin is true (`0') whenever the internal circuits have detected a short or thermal excursion and have disabled the LBUS output driver.
DS22230A-page 8
2010 Microchip Technology Inc.
MCP2003/4
TABLE 1-2:
TXD In L H L H x x RXD Out H H L L x x
FAULT/TXE TRUTH TABLE
FAULT/TXE LINBUS I/O VBB VBB GND GND VBB VBB Thermal Override OFF OFF OFF OFF ON x External Input H H H H H L Driven Output L H H H L x
Definition
FAULT, TXD driven low, LINBUS shorted to VBB (Note 1) OK OK OK, data is being received from the LINBUS FAULT, Transceiver in thermal shutdown NO FAULT, the CPU is commanding the transceiver to turn off the transmitter driver
Legend: x = don't care Note 1: The FAULT/TXE is valid after approximately 25 s after TXD falling edge. This is to eliminate false fault reporting during bus propagation delays.
1.5.5
TRANSMIT DATA INPUT (TXD)
1.5.7.1
Bus Dominant Timer
The Transmit Data Input pin has an internal pull-up. The LIN pin is low (dominant) when TXD is low, and high (recessive) when TXD is high. For extra bus security, TXD is internally forced to `1' whenever the transmitter is disabled regardless of external TXD voltage.
The Bus Dominant Timer is an internal timer that deactivates the LBUS transmitter after approximately 25 milliseconds of dominant state on the LBUS pin. The timer is reset on any recessive LBUS state. The LIN bus transmitter will be re-enabled after a recessive state on the LBUS pin as long as CS is high. Disabling can be caused by the LIN bus being externally held dominant, or by TXD being driven low. Additionally, on the MCP2004, the FAULT pin will be driven low to indicate the Transmitter Off state.
1.5.5.1
TXD Dominant Timeout
If TXD is driven low longer than approximately 10 ms, the LBUS pin is switched to Recessive mode and the part enters TOFF mode. This is to prevent the LIN node from permanently driving the LIN Bus dominant. The transmitter is re-enabled on the TXD rising edge.
1.5.8
BATTERY (VBB)
This is the Battery Positive Supply Voltage pin.
1.5.6
GROUND (VSS)
1.5.9
This is the Ground pin.
VOLTAGE REGULATOR ENABLE OUTPUT (VREN)
1.5.7
LIN BUS (LBUS)
The bidirectional LIN Bus pin (LBUS) is controlled by the TXD input. LBUS has a current limited open collector output. To reduce EMI, the edges during the signal changes are slope controlled and include corner rounding control for both falling and rising edges. The internal LIN receiver observes the activities on the LIN bus, and matches the output signal RXD to follow the state of the LBUS pin.
This is the External Voltage Regulator Enable pin. Open source output is pulled high to VBB in all modes, except Power Down.
1.5.10
EXPOSED THERMAL PAD (EP)
Do not electrically connect, or connect to Vss.
2010 Microchip Technology Inc.
DS22230A-page 9
MCP2003/4
NOTES:
DS22230A-page 10
2010 Microchip Technology Inc.
MCP2003/4
2.0
2.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
VIN DC Voltage on RXD, TXD, FAULT/TXE .....................................................................................................-0.3 to +30V VIN DC Voltage on CS, WAKE and VREN .......................................................................................................-0.3 to +30V VBB Battery Voltage, continuous ....................................................................................................................-0.3 to +30V VBB Battery Voltage, non-operating (LIN bus recessive, t < 60s) ..................................................................-0.3 to +43V VBB Battery Voltage, transient ISO 7637 Test 1 ......................................................................................................-200V VBB Battery Voltage, transient ISO 7637 Test 2a ...................................................................................................+150V VBB Battery Voltage, transient ISO 7637 Test 3a ....................................................................................................-300V VBB Battery Voltage, transient ISO 7637 Test 3b ...................................................................................................+200V VLBUS Bus Voltage, continuous.......................................................................................................................-18 to +30V VLBUS Bus Voltage, transient (Note 1)............................................................................................................-27 to +43V ILBUS Bus Short Circuit Current Limit ....................................................................................................................200 mA ESD protection on LIN, VBB (IEC 61000-4-2) (Note 2) ........................................................................................... 8 KV ESD protection on LIN, VBB (Human Body Model) (Note 3)................................................................................... 8 KV ESD protection on all other pins (Human Body Model) (Note 3) ............................................................................ 4 KV ESD protection on all pins (Charge Device Model) (Note 4) .................................................................................. 2 KV ESD protection on all pins (Machine Model) (Note 5).............................................................................................200V Maximum Junction Temperature ............................................................................................................................. 150C Storage Temperature .................................................................................................................................. -65 to +150C Note 1: ISO 7637/1 load dump compliant (t < 500 ms). 2: According to IEC 61000-4-2, 330 ohm, 150 pF and Tranceiver EMC Test Specifications [2] to [4]. 3: According to AEC-Q100-002/JESD22-A114. 4: According to AEC-Q100-011B. 5: According to AEC-Q100-003/JESD22-A115. NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
2010 Microchip Technology Inc.
DS22230A-page 11
MCP2003/4
2.2 DC Specifications
Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VBB = 6.0V to 27.0V TA = -40C to +125C Sym IBBQ IBBTO IBBPD IBBNOGND -- -- -1 Min. Typ. 90 75 5 -- Max. 150 120 15 1 Units A A A mA Conditions Operating Mode, bus recessive (Note 1) Transmitter off, bus recessive (Note 1) Transmitter off, bus recessive (Note 1) VBB = 12V, GND to VBB, VLIN = 0-18V
DC Specifications
Parameter Power VBB Quiescent Operating Current VBB Transmitter-off Current VBB Power Down Current VBB Current with VSS Floating Microcontroller Interface High Level Input Voltage (TXD, FAULT/TXE) Low Level Input Voltage (TXD, FAULT/TXE) High Level Input Current (TXD, FAULT/TXE) Low Level Input Current (TXD, FAULT/TXE)
High Level Voltage (VREN)
VIH VIL IIH IIL VHVREN IHVREN VIH VIL IIH IIL VIL VOL IOH
2.0 -0.3 -2.5 -10 -0.3 -20 2.0 -0.3 -10.0 -5.0 VBB - 4.0V -- -1
-- -- -- -- -- -- -- -- -- -- -- -- --
5.3 0.8 -- -- VBB+0.3 -10 VBB 0.8 10.0 5.0 -- 0.4 -1
V V A A Input voltage = 4.0V Input voltage = 0.5V
High Level Output Current (VREN) High Level Input Voltage (CS) Low Level Input Voltage (CS) High Level Input Current (CS) Low Level Input Current (CS) Low Level Input Voltage (WAKE) Low Level Output Voltage (RXD) High Level Output Current (RXD) Note 1: 2:
mA V V A A V V A
Output voltage = VBB0.5V Through a current limiting resistor
Input voltage = 4.0V Input voltage = 0.5V
IIN = 2 mA VLIN - VBB, VRXD = 5.5V
Internal current limited. 2.0 ms maximum recovery time (RLBUS = 0, TX = 0.4 VREG, VLBUS = VBB). Node has to sustain the current that can flow under this condition; bus must be operational under this condition.
DS22230A-page 12
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MCP2003/4
2.2 DC Specifications (Continued)
Electrical Characteristics: Unless otherwise indicated, all limits are specified for: VBB = 6.0V to 27.0V TA = -40C to +125C Sym VIH(LBUS) VIL(LBUS) VHYS IOL(LBUS) IPU(LBUS) ISC VOH(LBUS) V_LOSUP V_HISUP V_LOSUP-1K V_HISUP-1K IBUS_PAS_DOM Min. 0.6 VBB -8 -- 40 5 50 0.9 VBB -- -- 0.6 0.8 -1 Typ. -- -- -- -- -- -- -- -- -- -- -- -0.4 Max. 18 0.4 VBB 0.175 VBB 200 180 200 VBB 1.2 2.0 -- -- -- Units V V V mA A mA V V V V V mA VBB = 7V, RLOAD = 500 VBB = 18V, RLOAD = 500 VBB = 7V, RLOAD = 1 k VBB = 18V, RLOAD = 1 k Driver off, VBUS = 0V, VBB = 12V Driver off, 8V < VBB < 18V 8V < VBUs < 18V VBUS VBB GNDDEVICE = VBB, 0V < VBUS < 18V, VBB = 12V VBB = GND, 0 < VBUS < 18V, TA = -40C to +85C (Note 2) VBUS_CNT = (VIL (LBUS) + VIH (LBUS))/2 Conditions Recessive state Dominant state VIH(LBUS) - VIL(LBUS) Output voltage = 0.1 VBB, VBB = 12V ~30 k internal pull-up @ VIH (LBUS) = 0.7 VBB (Note 1)
DC Specifications
Parameter Bus Interface High Level Input Voltage Low Level Input Voltage Input Hysteresis Low Level Output Current Pull-up Current on Input Short Circuit Current Limit High Level Output Voltage Driver Dominant Voltage Driver Dominant Voltage Driver Dominant Voltage Driver Dominant Voltage Input Leakage Current (at the receiver during dominant bus level) Input Leakage Current (at the receiver during recessive bus level) Leakage Current (disconnected from ground) Leakage Current (disconnected from VBB)
IBUS_PAS_REC
--
12
20
A
IBUS_NO_GND
-10
1.0
+10
A
IBUS
--
--
10
A
Receiver Center Voltage Slave Termination Note 1: 2:
VBUS_CNT RSLAVE
0.475 VBB 20
0.5 VBB 30
0.525 VBB 47
V k
Internal current limited. 2.0 ms maximum recovery time (RLBUS = 0, TX = 0.4 VREG, VLBUS = VBB). Node has to sustain the current that can flow under this condition; bus must be operational under this condition.
2010 Microchip Technology Inc.
DS22230A-page 13
MCP2003/4
2.3 AC Specifications
VBB = 6.0V to 27.0V; TA = -40C to +125C Sym tslope ttranspd trecpd trecsym Min. 3.5 -- -- -2.0 Typ. -- -- -- -- Max. 22.5 4.0 6.0 2.0 Units s s s s Test Conditions 7.3V <= VBB <= 18V ttranspd = max (ttranspdr or ttranspdf) trecpd = max (trecpdr or trecpdf) trecsym = max (trecpdf - trecpdr) Parameter Slope rising and falling edges Propagation Delay of Transmitter Propagation Delay of Receiver Symmetry of Propagation Delay of Receiver rising edge w.r.t. falling edge Symmetry of Propagation Delay of Transmitter rising edge w.r.t. falling edge Time to sample of FAULT/ TXE for bus conflict reporting Duty Cycle 1 @20.0 kbit/sec AC CHARACTERISTICS
Bus Interface - Constant Slope Time Parameters
ttranssym tfault
-2.0
--
2.0
s
ttranssym = max (ttranspdf - ttranspdr)
-- 39.6
-- --
32.5 --
s
tfault = max (ttranspd + tslope + trecpd)
%tbit Cbus;Rbus conditions: 1 nF; 1 kW | 6.8 nF; 660W | 10 nF; 500W THrec(max) = 0.744 x VBB, THdom(max) = 0.581 x VBB, VBB =7.0V-18V; tbit = 50 s D1 = tbus_rec(min) / 2 x tbit) %tbit Cbus;Rbus conditions: 1 nF; 1 kW | 6.8 nF; 660W | 10 nF; 500W THrec(max) = 0.284 x VBB, THdom(max) = 0.422 x VBB, VBB =7.6V-18V; tbit = 50 s D2 = tbus_rec(max) / 2 x tbit) %tbit Cbus;Rbus conditions: 1 nF; 1 kW | 6.8 nF; 660W | 10 nF; 500W THrec(max) = 0.778 x VBB, THdom(max) = 0.616 x VBB, VBB =7.0V-18V; tbit = 96 s D3 = tbus_rec(min) / 2 x tbit) %tbit Cbus;Rbus conditions: 1 nF; 1 kW | 6.8 nF; 660W | 10 nF; 500W THrec(max) = 0.251 x VBB, THdom(max) = 0.389 x VBB, VBB =7.6V-18V; tbit = 96 s D4 = tbus_rec(max) / 2 x tbit) s s s s s Vren floating Vren floating Bus debounce time, 10 s typical After Bus debounce time, 52 s typical
Duty Cycle 2 @20.0 kbit/sec
--
--
58.1
Duty Cycle 3 @10.4 kbit/sec
41.7
--
--
Duty Cycle 4 @10.4 kbit/sec
--
--
59.0
Wake-up Timing Bus Activity Debounce time Bus Activity to Vren on WAKE to Vren on Chip Select to Vren on Chip Select to Vren off tBDB tBACTVE tWAKE tCSOR tCSPD -- -- 5 35 20 150 150 150 80
DS22230A-page 14
2010 Microchip Technology Inc.
MCP2003/4
2.4 Thermal Specifications
Parameter Recovery Temperature Shutdown Temperature Short Circuit Recovery Time Thermal Package Resistances Thermal Resistance, 8L-DFN Thermal Resistance, 8L-PDIP Thermal Resistance, 8L-SOIC Note 1: JA JA JA 35.7 89.3 149.5
-- -- --
THERMAL CHARACTERISTICS Symbol RECOVERY SHUTDOWN tTHERM Typ +140 +150 1.5 Max
-- --
Units C C ms C/W C/W C/W
Test Conditions
5.0
The maximum power dissipation is a function of TJMAX, JA and ambient temperature TA. The maximum allowable power dissipation at an ambient temperature is PD = (TJMAX - TA)JA. If this dissipation is exceeded, the die temperature will rise above 150C and the MCP2003/4 will go into thermal shutdown.
2010 Microchip Technology Inc.
DS22230A-page 15
MCP2003/4
2.5
Note:
Typical Performance Curves
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VBB = 6.0V to 18.0V, TA = -40C to +125C.
FIGURE 2-1:
0.14 0.12
TYPICAL IBBQ
FIGURE 2-3:
0.12 0.1
TYPICAL IBBTO
Current (mA)
Current (mA)
0.1 0.08 0.06 0.04 0.02 0 6 7.3 12 14.4 18 -40C 25C 85C 125C
0.08 0.06 0.04 0.02 0 6V 7.3V 12V 14.4V 18V
-40C 25C 85C 125C
VBB (V)
VBB (V)
FIGURE 2-2:
0.008 0.007 0.006
TYPICAL IBBPD
Current (mA)
0.005 0.004 0.003 0.002 0.001 0 6 7.3 12 14.4 18
-40C 25C 85C 125C
VBB (V)
DS22230A-page 16
2010 Microchip Technology Inc.
MCP2003/4
2.6 Timing Diagrams and Specifications
BUS TIMING DIAGRAM
TXD 50% 50%
FIGURE 2-4:
LBUS
.95VLBUS .50VBB 0.5VLBUS TTRANSPDF TTRANSPDR 0.0V
TRECPDF RXD 50%
TRECPDR 50%
Internal TXD/RXD Compare
Match
Match
Match
Match
Match
FAULT Sampling TFAULT FAULT/TXE Output Stable Hold Value Stable Hold Value TFAULT Stable
FIGURE 2-5:
CS
CS TO VREN TIMING DIAGRAM
TCSOR VBB
VREN TCSPD
OFF
FIGURE 2-6:
LBUS
BUS TO VREN WAKE TIMING DIAGRAM
.4VBB TBDB + TBACTVE VBB
VREN
2010 Microchip Technology Inc.
DS22230A-page 17
MCP2003/4
NOTES:
DS22230A-page 18
2010 Microchip Technology Inc.
MCP2003/4
3.0
3.1
PACKAGING INFORMATION
Package Marking Information
8-Lead DFN (4x4) XXXXXX XXXXXX YYWW NNN Example: 2004 e3 E/MD^^ 0948 256
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW
Example: MCP2003 e3 E/P^^256 0948
8-Lead SOIC (150 mil)
Example:
XXXXXXXX XXXXYYWW NNN
MCP2003E e3 SN^^0948 256
Legend: XX...X Y YY WW NNN
e3
* Note:
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
2010 Microchip Technology Inc.
DS22230A-page 19
MCP2003/4
8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
Microchip Technology Drawing C04-131E Sheet 1 of 2
DS22230A-page 20
2010 Microchip Technology Inc.
MCP2003/4
8-Lead Plastic Dual Flat, No Lead Package (MD) - 4x4x0.9 mm Body [DFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
Microchip Technology Drawing C04-131E Sheet 2 of 2
2010 Microchip Technology Inc.
DS22230A-page 21
MCP2003/4
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
DS22230A-page 22
2010 Microchip Technology Inc.
MCP2003/4
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2010 Microchip Technology Inc.
DS22230A-page 23
MCP2003/4
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DS22230A-page 24
2010 Microchip Technology Inc.
MCP2003/4
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2010 Microchip Technology Inc.
DS22230A-page 25
MCP2003/4
NOTES:
DS22230A-page 26
2010 Microchip Technology Inc.
MCP2003/4
APPENDIX A: REVISION HISTORY
Revision A (March 2010)
* Original Release of this Document.
2010 Microchip Technology Inc.
DS22230A-page 27
MCP2003/4
NOTES:
DS22230A-page 28
2010 Microchip Technology Inc.
MCP2003/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package Examples:
a) b) c) d) MCP2003-E/MD: Extended Temperature, 8L-DFN pkg. MCP2003-E/P: Extended Temperature, 8L-PDIP pkg. MCP2003-E/SN: Extended Temperature, 8L-SOIC pkg. MCP2003T-E/MD: Tape and Reel, Extended Temperature, 8L-DFN pkg. MCP2003T-E/SN: Tape and Reel, Extended Temperature, 8L-SOIC pkg. Extended Temperature, 8L-DFN pkg. MCP2004-E/P: Extended Temperature, 8L-PDIP pkg. MCP2004-E/SN: Extended Temperature, 8L-SOIC pkg. MCP2004T-E/MD: Tape and Reel, Extended Temperature, 8L-DFN pkg. MCP2004T-E/SN: Tape and Reel, Extended Temperature, 8L-SOIC pkg.
Device:
MCP2003: LIN Transceiver with Voltage Regulator MCP2003T: LIN Transceiver with Voltage Regulator (Tape and Reel) (DFN and SOIC) MCP2004: LIN Transceiver with Voltage Regulator MCP2004T: LIN Transceiver with Voltage Regulator (Tape and Reel) (DFN and SOIC)
e)
Temperature Range: E
= -40C to +125C
Package:
MD = Plastic Micro Small Outline (4x4), 8-lead P = Plastic DIP (300 mil Body), 8-lead, 14-lead SN = Plastic SOIC, (150 mil Body), 8-lead
a) b) c) d)
MCP2004-E/MD:
e)
2010 Microchip Technology Inc.
DS22230A-page 29
MCP2003/4
NOTES:
DS22230A-page 30
2010 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2010, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
ISBN: 978-1-60932-080-5
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
2010 Microchip Technology Inc.
DS22230A-page 31
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049
ASIA/PACIFIC
India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350
EUROPE
Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820
01/05/10
DS22230A-page 32
2010 Microchip Technology Inc.

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